Transistor-level circuit simulation is important for designing integrated circuits. Simulating a circuit's behavior before actually building it can greatly improve design efficiency by making faulty designs known and providing insight into the behavior of electronics circuit designs. A circuit simulator formulates circuit equations and then numerically solves them to compute the circuit response to a particular stimulus. Developed about forty years ago, SPICE (Simulation Program with Integrated Circuit Emphasis) simulators are still being widely used in part due to its precision.
While offering superior precision, SPICE simulators are limited to the simulation of small subcircuit blocks because of their memory capacity requirements and performance limitations. During simulation, device connectivity and parameters are stored for each device. As a result, the memory usage is approximately proportional to the circuit size measured in number of devices in the circuit. Assuming 500 bytes of memory per device, about 50 Gigabytes (50 billion bytes) of memory are required to simulate a circuit containing 100 million devices. The circuit size also presents another challenge, namely simulation time, to conventional transistor-level simulators. As noted above, the circuit behavior is formulated into mathematical equations to be solved during simulation. The computations increase with the number of devices in the circuit. For a circuit with tens of millions of devices, tens of millions of equations may be required. The excessive memory usage and computation time required make it impractical to use conventional transistor-level simulators for full-chip simulation on today's integrated circuits.
The Fast-SPICE simulators have been developed to address these limitations. One of the main approaches adopted by the Fast-SPICE simulators is breaking a circuit into smaller subcircuits and solving each subcircuit independently. Further, if the signals in one or more subcircuits are latent during an interval of time, then it is not necessary to solve for them during that interval of time. Many integrated circuits have repetitive elements such as memory cells. Only a small number of these cells are activated at a time. Computation time and memory consumed for simulating these circuits could be significantly reduced by taking advantage of these properties.